This function varies for each unique hardware platform running so it is not implemented here. The function tickDelay in the code is a user-generated routine to wait a variable number of 1/4 microseconds. Setting this bit to 1 releases the 1-Wire to be pulled up by the resistor pullup or pulled down by a 1-Wire slave device. Setting this bit to 0 drives the 1-Wire line low. The code assumes bit 0 of this location controls the 1-Wire bus. The constant PORTADDRESS in the code (Figure 3) is defined as the location of the communication port. These functions can be replaced by platform appropriate functions. They are typically located in the standard library. This following code samples rely on two common 'C' functions outp and inp to write and read bytes of data to input/output (I/O) port locations. Worksheet to calculate these values is available for download. Sample bus, 0 = device(s) present, 1 = no device presentįigure 1. Reset the 1-Wire bus slave devices and ready them for a command Read a bit from the 1-Wire slaves (Read time slot) Send a '0' bit to the 1-Wire slaves (Write 0 time slot) Send a '1' bit to the 1-Wire slaves (Write 1 time slot) See the downloadable worksheet to enter system and device parameters to determine minimum and maximum values. Alternate values can be used when restricting the 1-Wire master to a particular set of devices and line conditions. Table 2 shows the recommended timings for the 1-Wire master to communicate with 1-Wire devices over the most common line conditions. Figure 1 illustrates the waveforms graphically. See Table 1 below for a brief description of each operation and a list of the steps necessary to generate it. Byte functions can then be derived from multiple calls to the bit operations. The time it takes to perform one bit of communication is called a time slot in the device data sheets. The four basic operations of a 1-Wire bus are Reset, Write 1 bit, Write 0 bit, and Read bit. The communication operations must not be interrupted while being generated.The system must be capable of generating an accurate and repeatable 1µs delay for standard speed and 0.25µs delay for overdrive speed.See Category 1 in application note 4206, "Choosing the Right 1-Wire® Master for Embedded Application" for a simple example of a 1-Wire master microprocessor circuit. The communication port must be bidirectional, its output is open-drain, and there is a weak pullup on the line.There are several system requirements for proper operation of the code examples: Overdrive communication speed is also covered by this document. This application note provides an example, written in 'C', of the basic standard-speed 1-Wire master communication routines. IntroductionĪ microprocessor can easily generate 1-Wire timing signals if a dedicated bus master is not present. The time values provided produce the most robust 1-Wire master for communication with all 1-Wire devices over various line conditions. A microprocessor can easily generate 1-Wire ® timing signals if a true bus master is not present (e.g., DS2480B, the family of DS2482 parts).
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